I would suggest this topic
viewtopic.php?p=572356#p572356
The methodology your using is for unsigned types, and the main problem is with the << (shift arithmetic right)
You can do both 32 and 16 bit byte swaps in a quad and mask it off but you can't do the same for 64 bit with that method
Code: Select all
;Macro BSWAP64(v)
; v = ((v >> 8) & $00FF00FF00FF00FF) | ((v & $00FF00FF00FF00FF) << 8) ;flip adjacent bytes
; v = ((v >> 16) & $0000ffff0000ffff) | ((v & $0000ffff0000ffff) << 16) ; flip words
; v = (v >> 32) | (v << 32) ;flip dwords
;EndMacro
Macro BSWAP32(v)
vi.q = v
vi = ((vi >> 8) & $00FF00FF) | ((vi & $00FF00FF) << 8) ;flip adjacent bytes
vi = (vi >> 16) | vi << 16 ;flip words
v = vi & $FFFFFFFF
EndMacro
Macro BSWAP16(v)
vi.q = v
vi = ((vi >> 8) & $00FF) | ((vi & $00FF) << 8) ;flip adjacent bytes
v = vi & $FFFF
EndMacro
or you can use a dirty macro hack to enable unsigned but it only works fasm windows and linux
Code: Select all
;EnableUnsigned v1.0a
;Author Idle 25/3/16
;Supports PB 5.42LTS Window, Linux
;Unsigned arithmetic and logical comparisons for
;x64: Long, Integer, Quads
;x86: Long, Integer
;Usage:
;Scope unsigned arithmetic and logic in EnableUnsigned() DisableUnsigned() blocks
;EnableUnsigned()
;if ux > uy ; changes the operators to unsigned: supports < > <= >= <> =
; do something unsigned: supports * / + - << >>
; DisableUnsigned()
; ;back to signed
;EndIf
;Disableunsigned() ;Note you can call Disableunsigned() where ever you need it
CompilerIf SizeOf(integer) = 4
Macro EnableUnsigned()
!macro IDIV var
!{
!mov edx,0
!div var
!}
!macro IMUL reg,var
!{
!mov eax,reg
!mul var
!mov reg,eax
!}
!macro SAR reg,var
!{
!shr reg,var
!}
!macro SAL reg,var
!{
!shl reg,var
!}
!macro CDQ {}
!macro JG arg
!{
!JA arg
!}
!macro JGE arg
!{
!JAE arg
!}
!macro JL arg
!{
!JB arg
!}
!macro JLE arg
!{
!JBE arg
!}
EndMacro
Macro DisableUnsigned()
!purge IDIV
!purge IMUL
!purge SAR
!purge SAL
!purge CDQ
!purge JG
!purge JGE
!purge JL
!purge JLE
EndMacro
CompilerElse
Macro EnableUnsigned()
!macro IDIV var
!{
!mov rdx,0
!div var
!}
!macro IMUL reg,var
!{
!match =qword x , var
!\{ mov rax, reg
!mov r15, var
!\}
!mul reg
!mov reg,rax
!}
!macro SAR reg,var
!{
!shr reg,var
!}
!macro SAL reg,var
!{
!shl reg,var
!}
!macro MOVSXD reg,var
!{
!match =dword x , var
!\{ mov eax, var
!mov reg,rax \}
!}
!macro CQO {}
!macro CDO {}
!macro CWD {}
!macro CBW {}
!macro CWDE{}
!macro CDQE {}
!macro CDQ {}
!macro JG arg
!{
!JA arg
!}
!macro JGE arg
!{
!JAE arg
!}
!macro JL arg
!{
!JB arg
!}
!macro JLE arg
!{
!JBE arg
!}
EndMacro
Macro DisableUnsigned()
!purge IDIV
!purge IMUL
!purge SAR
!purge SAL
!purge MOVSXD
!purge CQO
!purge CDO
!purge CWD
!purge CBW
!purge CWDE
!purge CDQE
!purge CDQ
!purge JG
!purge JGE
!purge JL
!purge JLE
EndMacro
CompilerEndIf
Macro BSWAP64(v)
v = ((v >> 8) & $00FF00FF00FF00FF) | ((v & $00FF00FF00FF00FF) << 8) ;flip adjacent bytes
v = ((v >> 16) & $0000ffff0000ffff) | ((v & $0000ffff0000ffff) << 16);flip words
v = (v >> 32) | (v << 32) ;flip dwords
EndMacro
Macro BSWAP32(v)
v = ((v >> 8) & $00FF00FF) | ((v & $00FF00FF) << 8) ;flip adjacent bytes
v = (v >> 16) | v << 16 ;flip words
EndMacro
Macro BSWAP16(v)
v = ((v >> 8) & $00FF) | ((v & $00FF) << 8) ;flip adjacent bytes
EndMacro
Global vl.l = $fedcba12; // 32-bit word to reverse bit order
Global vi.i = $FEDCBA9876543210
EnableUnsigned()
bswap32(vl)
bswap64(vi)
DisableUnsigned()
Debug Hex(vl,#PB_Long)
Debug Hex(vi,#PB_Quad)